True hardware random number generation implemented in the 32-nm SOI POWER7+ processor.
| Autor: | Liberty, John S.1 jliberty@us.ibm.com, Barrera, Adrian1 abarrera@us.ibm.com, Boerstler, David W.2 boerstle@us.ibm.com, Chadwick, Thomas B.3 tchadwic@us.ibm.com, Cottier, Scott R.1 cottier@us.ibm.com, Hofstee, H. Peter4 hofstee@us.ibm.com |
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| Zdroj: | IBM Journal of Research & Development. Nov/Dec2013, Vol. 57 Issue 6, p1-7. 7p. |
| Databáze: | Business Source Ultimate |
| Externí odkaz: |
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