Gate Sizing for Cell-Library-Based Designs.
| Autor: | Shiyan Hu1 shiyan@mtu.edu, Ketkar, Mahesh2 mahesh.c.ketkar@intel.com, Jiang Hu3 jianghu@ece.tamu.edu |
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| Zdroj: | IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems. Jun2009, Vol. 28 Issue 6, p818-825. 8p. |
| Databáze: | Business Source Ultimate |
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