Hardware architecture for high-speed real-time dynamic programming applications.
| Autor: | Matthews, B.1, Elhanany, I.1 |
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| Zdroj: | IET Computers & Digital Techniques (Institution of Engineering & Technology). May2008, Vol. 2 Issue 3, p164-171. 8p. 1 Black and White Photograph, 3 Diagrams, 2 Charts, 2 Graphs. |
| Databáze: | Business Source Ultimate |
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