A RISC architecture extended by an efficient tightly coupled reconfigurable unit.
Autor: | Vassiliadis, N.1 nivas@skiathos.physics.auth.gr, Kavvadias, N.1, Theodoridis, G.1, Nikolaidis, S.1 |
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Zdroj: | International Journal of Electronics. Jun2006, Vol. 93 Issue 6, p421-438. 18p. 8 Diagrams, 4 Charts, 2 Graphs. |
Databáze: | Business Source Ultimate |
Externí odkaz: |