A read-disturb-free and write-ability enhanced 9T SRAM with data-aware write operation.
Autor: | Lv, Jiaxun1 (AUTHOR), Wang, Zilin1 (AUTHOR), Huang, Maohang1 (AUTHOR), He, Yajuan1 (AUTHOR) yjhe@uestc.edu.cn |
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Zdroj: | International Journal of Electronics. Jan 2022, Vol. 109 Issue 1, p23-37. 15p. |
Databáze: | Business Source Ultimate |
Externí odkaz: |