Transistor Count Reduction by Gate Merging.

Autor: Conceicao, Calebe Micael de Oliveira1 (AUTHOR) calebeconceicao@charqueadas.ifsul.edu.br, Reis, Ricardo Augusto da Luz2 (AUTHOR) reis@inf.ufrgs.br
Zdroj: IEEE Transactions on Circuits & Systems. Part I: Regular Papers. Jun2019, Vol. 66 Issue 6, p2175-2187. 13p.
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