An Effective Pixel Rasterization Pipeline Architecture for 3D Rendering Processors.
| Autor: | Woo-Chan Park, Shay1 pwcahn@korea.com, Kil-Whan Lee, Shay2 Kiwh@kurene.yonsei.ac.kr, II-San Kim, Shay2 sany@kurene.yonsei.ac.kr, Tack-Don Han, Shay3 hantack@kurene.yonsei.ac.kr, Sung-Bong Yang, Shay3 yang@mythos.yonsei.ac.kr |
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| Zdroj: | IEEE Transactions on Computers. Nov2003, Vol. 52 Issue 11, p1501-1508. 8p. |
| Databáze: | Business Source Ultimate |
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