Implementation of optimized ternary AND gate using 18nm FinFET.
| Autor: | Gupta, Lipika1 (AUTHOR) lipikagupta21@gmail.com, Dassi, Minaxi2 (AUTHOR) minaxi.dassi@chitkarauniversity.edu.in, Goyal, Mohit3 (AUTHOR) mohit.goyal@chitkara.edu.in, Sharma, Kulbhushan3 (AUTHOR) kulbhushan.sharma@chitkara.edu.in |
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| Zdroj: | AIP Conference Proceedings. 2024, Vol. 3209 Issue 1, p1-7. 7p. |
| Databáze: | Academic Search Ultimate |
| Externí odkaz: |
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