A memory interface for DDR3 SDRAM memory in Xilinx 7 Series FPGAs.
| Autor: | Beguš, Jari jari.begus@gmail.com, Žemva, Andrej1, Zadnik, Damjan |
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| Zdroj: | Electrotechnical Review / Elektrotehniski Vestnik. 2022, Vol. 89 Issue 5, p239-245. 7p. |
| Databáze: | Academic Search Ultimate |
| Externí odkaz: |
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