Evaluation of Suitability of Sorting Circuits as 3-D Integrated Circuits.
| Autor: | Ichijo, Yasuhiko1, Kurokawa, Takakazu2, Inada, Jouji3 |
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| Zdroj: | Electronics & Communications in Japan, Part 2: Electronics. Feb92, Vol. 75 Issue 2, p101-113. 13p. |
| Databáze: | Academic Search Ultimate |
| Externí odkaz: |
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