Decimal addition on FPGA based on a mixed BCD/excess-6 representation.
Autor: | Neto, Horácio1 hcn@inesc-id.pt, Véstias, Mário2 mvestias@deetc.isel.pt |
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Zdroj: | Microprocessors & Microsystems. Nov2017, Vol. 55, p91-99. 9p. |
Databáze: | Academic Search Ultimate |
Externí odkaz: |