Wideband and Compact-Size Six-Port Receiver

Autor: Guan-Chun Huang, 黃冠淳
Rok vydání: 2017
Druh dokumentu: 學位論文 ; thesis
Popis: 105
This goal of this work is the development of wideband six-port receiver with compact size. This receiver is composed of six-port network, power detectors and analog substractors. In order to achieve widewidth band and compact size simultaneously, bridged-T coil-based six-port network realized by the integrated passive device (IPD) process is proposed. The measured 10-dB return loss bandwidth is from 1.28GHz to 2.81GHz and the corresponding fractional bandwidth is 78.5%. Furthermore, this compact six-port network exhibits a circuit size of only 7.78 mm×7.94 mm, which corresponds to an electrical size of 0.051λ0×0.052λ0 at f0 = 1.95GHz. Next, shottcky diodes are used to implement wideband power detectors with a center frequency f0=1.95GHz and 10-dB return loss bandwidth from 1.06GHz to 2.4GHz. Parameter studies to improve the sensitivity and conversion efficiency has also been done. Then, analog subtractors are used to obtain the difference between two power detector’s outputs to give the demodulated I/Q signal. This work also presents two subtractor designs for high sensitivity or high bit rate considerations. Lastly, four power detectors, two analog subtractors, and the six-port network IPD chip are integrated in a PCB to realize the six-port receiver front-end. The measured 10-dB return loss bandwidth for the RF port is from 1.4GHz~2.55GHz (FBW = 58.97%) and that for the LO port is from 1.35GHz~2.75GHz (FBW = 71.79%). The circuit size of the proposed receiver front end is about 27.71mm×45.72mm, which corresponds to an electrical size of 0.18λ0×0.3λ0 at f0=1.95GHz. The receiver is tested under three kinds of modulation scheme, i.e., QPSK, 16-QAM and 64-QAM. The proposed six-port receiver frond end can cover the frequency band from 1.6GHz to 2.4GHz. For the designⅠ, under a data rate of 1Msps and a LO power of 0 dBm, the measured RF port sensitivity for 64-QAM modulation is -35dBm, and the maximal data rate is 5Msps. III For the designⅡ under a data rate of 5Msps and a LO power of 0 dBm, the RF port sensitivity for 64-QAM modulation is -15dBm but a maximal data rate of 20Msps can be achieved. The proposed receiver front end design maintains the advantages of low circuit complexity and high bandwidth of the conventional six-port receiver, while the circuit size is significantly reduced by using bridged-T coils. The proposed receiver can accommodate multiple modulation schemes. It can be further integrated with a low noise amplifier, a synthesizer, and baseband circuits to implement a software defined radio receiver for handheld wireless communication devices.
Databáze: Networked Digital Library of Theses & Dissertations
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