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In this work coherent porous silicon (CPS) is used as a base technology to develop micro Loop Heat Pipes (LHP) and multi-turn micro chromatograph. The issues with silicon passivation in a photon pumped electrochemical cell are discussed and innovative solutions are presented. The challenges faced in micropatterning CPS, such as stress development around the boundaries, material selection, electrolyte selection and process development are described. The micro LHP developed in this lab provides a planar surface for microelectronic chip cooling. Several generations of these devices were built with improvements in design and optimization of heat transfer. Recently 60W/cm2 of heat flux was removed using our current micro LHP. Many steady state models were developed in this work to understand the heat delivery and to optimize the same in a micro LHP. Microfabrication of individual components and packaging issues involved are described. The automation of the micro LHP test setup, as well as the test results are also shown. Using the patterned CPS wick and the new top-cap configuration, 20 W/cm2 of heat flux was transferred from the evaporator the condenser of the micro LHP, however the author believes that a near order of magnitude improvement is yet possible. A micro chromatograph was earlier developed in this lab using micro channels in (110) silicon. In the present modeling studies, replacing the micro channels with a CPS wick, utilizing the same above technology, showed (by modeling studies) drastic improvement in the efficiency of separation of species in a chromatographic device. By utilizing the pore walls of the CPS wick as a separating surface; all three spatial dimensions can be utilized. This enhanced the packing density and increased the number of plates per unit length of the chromatograph. The multi-turn CPS chromatograph utilizes some unique packaging techniques, namely damascene process. The challenges faced in packaging to seal the device, supply with electrodes for detection and providing input and output ports are discussed. A thorough model was developed to analyze and compare the efficiency of this device with the previous device developed in this lab using micro channels. |
