Sub-20 nm multilayer nanopillar patterning for hybrid SET/CMOS integration
| Autor: | Pourteau, M.-L., Gharbi, A., Brianceau, P., Dallery, J.-A., Laulagnet, F., Rademaker, G., Tiron, R., Engelmann, H.-J., von Borany, J., Heinig, K.-H., Rommel, M., Baier, L. |
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| Zdroj: | In Micro and Nano Engineering November 2020 9 |
| Databáze: | ScienceDirect |
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