Recent diagnostic developments at ASDEX Upgrade with the FPGA implemented Serial I/O System “SIO2” and “Pipe2” DAQ periphery

Autor:	Behler, K.C. *, Eixenberger, H., Kurzan, B., Lohs, A., Lüddecke, K., Maraschek, M., Merkel, R., Raupp, G., Sellmair, G., Sieglin, B., Treutterer, W.
Zdroj:	In Fusion Engineering and Design October 2020 159
Databáze:	ScienceDirect
Externí odkaz:	Zobrazit plný text záznamu Full Text from ScienceDirect