| Autor: |
Jiann-Jong Chen, Yuh-Shyan Hwang, Tz-Shiuan Tzeng, Chien-Hung Lai, Joshua Ku |
| Jazyk: |
angličtina |
| Rok vydání: |
2022 |
| Předmět: |
|
| Zdroj: |
IEEE Access, Vol 10, Pp 63063-63072 (2022) |
| Druh dokumentu: |
article |
| ISSN: |
2169-3536 |
| DOI: |
10.1109/ACCESS.2022.3183028 |
| Popis: |
A low-noise fast-transient-response second-order delta-sigma-modulation buck converter with hysteresis-voltage-controlled techniques is proposed. With the proposed control approach, the transient time can be accelerated by roughly 60%. The rail-to-rail OTA generates a current ISense, which replicates the inductor current IL with K times. As ISense flows through the capacitor CSense, it will be converted into VSense. Then, the hysteresis-voltage-controlled (HVC) circuit compares the two terminal voltages of hysteresis comparator to detect the overshoot and undershoot of VSense. Once VSense is detected, the output signal of HVC circuits becomes opposite to the previous state to conduct MP and MN previously. Besides, the 2nd-order delta-sigma-modulation (DSM) circuit plays a vital role of mitigating noise-interference and elevating noise in whole circuits. The proposed converter has been fabricated in TSMC $0.18~\mu \text{m}$ 1P6M CMOS processes with an active area of $1.19\times 1.09$ mm2. The measured results show the transient time are $3.5~\mu \text{s}$ and $3.2~\mu \text{s}$ , respectively, when the load current changes between 500mA and 100mA. On the basic of the measured results of fast-fourier-transform (FFT), the value of output-to-noise ratio (ONR) is 76.6dB at the sampling frequency of 10MHz. The peak conversion efficiency is 92.1% while the load current is 300mA. |
| Databáze: |
Directory of Open Access Journals |
| Externí odkaz: |
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