| Autor: |
Iraj Moghaddasi, Ghassem Jaberipur, Danial Javaheri, Byeong-Gyu Nam |
| Jazyk: |
angličtina |
| Rok vydání: |
2024 |
| Předmět: |
|
| Zdroj: |
IEEE Access, Vol 12, Pp 96552-96564 (2024) |
| Druh dokumentu: |
article |
| ISSN: |
2169-3536 |
| DOI: |
10.1109/ACCESS.2024.3426625 |
| Popis: |
Deep neural network (DNN) is becoming pervasive in today’s applications with intelligent autonomy. Nonetheless, the ever-increasing complexity of modern DNN models caused several challenges on edge devices, struggling to support the intensive computing demands. Although several hardware accelerators have been introduced to improve performance and computation efficiency, challenges still exist particularly in mission-critical applications, e.g., automotive and healthcare. Compression and approximation have been utilized in this respect, albeit with the probability of accuracy loss. Meanwhile, serial accelerators increase computation efficiency via dynamic precision adaptation and computation pruning but at the expense of increasing response time. This paper proposes the Redundant number system-based Neural Processing Engine (RNPE) with the Most Significant Digit First (MSDF) input and output streams. RNPE reduces the response time while improving computation efficiency compared to traditional bit-parallel and bit-serial processing engines. The proposed architecture has been described in RTL and synthesized in 28 nm CMOS technology for evaluation. Cycle-accurate simulations over the DNN models of image classification demonstrated a single unit of RNPE significantly reduces the response time by up to 97% with no accuracy loss compared to the baseline; however, an additional 25% area overhead is imposed. Furthermore, RNPE improves the average power-delay and energy-delay products by 14% and 53%, respectively. Eventually, RNPE exceeds the state-of-the-art by 23% on average in pruning ineffectual computations on the MSDF output stream. |
| Databáze: |
Directory of Open Access Journals |
| Externí odkaz: |
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