Monotonic transition based forward body bias for dual threshold voltage low power embedded processors
| Autor: | S. Jayapal, Y. Manoli |
|---|---|
| Jazyk: | German<br />English |
| Rok vydání: | 2006 |
| Předmět: | |
| Zdroj: | Advances in Radio Science, Vol 4, Pp 269-273 (2006) |
| Druh dokumentu: | article |
| ISSN: | 1684-9965 1684-9973 |
| Popis: | Dual threshold voltage and forward body bias techniques are effective ways to optimally balance the standby leakage power and performance. In this paper, we propose a novel fine-grained forward body biasing scheme for monotonic static logic circuits. In the proposed scheme, the forward body bias is applied to high threshold voltage of either the pull-up or the pull-down network based on the evaluation transition and the state of operation. This technique improves the low skew NAND and NOR circuit performance by 7% and 11%, high skew NAND and NOR by 8% and 13% respectively. It reduces both active and standby leakage power as compared to monotonic static CMOS with dual-VT technique. The simulations are carried out using 130 nm mixed mode process technology to validate our proposed technique. |
| Databáze: | Directory of Open Access Journals |
| Externí odkaz: |
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