| Autor: |
Siek, Liter, Graham, Rigby |
| Přispěvatelé: |
School of Electrical and Electronic Engineering, 9th Australian Microelectronics Conference: 'Foundation for the future', VIRTUS, IC Design Centre of Excellence |
| Jazyk: |
angličtina |
| Rok vydání: |
1990 |
| Předmět: |
|
| Popis: |
An unclocked A/D technique using a serial chain of comparators in its speed limiting path is described. The design fabricated in 2 μm double-metal single-polysilicon p-well CMOS technology occupies an area of 1.67 mm×1.67 mm, produces an 8-bit conversion in |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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