High frequency DC-DC converter with co-packaged planar inductor and power IC
Autor: | Santosh Kulkarni, Joe O'Brian, Declan P. Casey, Saibal Roy, A.-M. Kelleher, Finbarr Waldron, Kenneth Rodgers, Margaret Hegarty, Kevin G. McCarthy, Cian O Mathuna, Jason Hannon, Mark Barry, Ray Foley, John Barry, James F. Rohan, Ningning Wang |
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Rok vydání: | 2013 |
Předmět: |
CMOS process
Engineering Switched-mode power supply Planar inductor Switched mode power supply PwrSiP Resistance Voltage 5 V DC-DC converter Power IC Integrated circuits Integrated circuit design Integrated circuit IC design Inductor Size 0.35 mum Magnetic cores law.invention Cost reduction System in package Frequency 40 MHz law Power integrated circuits Electronic engineering Inductors Inductance Shift registers Power converters Buck converter business.industry On-silicon integrated micro-inductors Electrical engineering DC-DC power convertors Mixed-signal integrated circuit Form factor reduction CMOS integrated circuits Wires Power supply in package solution Boost converter Frequency 20 MHz business System-in-package |
Zdroj: | 2013 IEEE 63rd Electronic Components and Technology Conference. |
DOI: | 10.1109/ectc.2013.6575844 |
Popis: | The paper introduces the trend of integration and miniaturization of power converters with potential for enhanced efficiency, form factor reduction and cost reduction. To demonstrate the concept of highly integrated switched mode power supply with integrated magnetic, a system-in-package DC-DC converter using a stacked co-packaging approach is developed. A system approach was taken to the design, and functional integration, using 3-D packaging for realizing a power supply in package solution (PwrSiP). The target integrated converter is capable of handling an input voltage of 5V and frequencies up to 40MHz. A DC-DC converter IC on a 0.35μm CMOS process was designed to meet this goal. In parallel with the IC design, technology development for on-silicon integrated micro-inductors was completed to achieve small-form factor and extremely low profile. A maximum measured efficiency of 83% and 78% was achieved on the stacked converter operating at 20MHz and 40MHz, respectively. The stacked approach showed a 30% area reduction compared to side-by-side implementation with external discrete inductor. |
Databáze: | OpenAIRE |
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