| Popis: |
The article describes an innovative bit error rate reduction technique principle and its practical implementation. The design of the technique is implemented in an FPGA and is combined with other more conventional BER reduction techniques, such as Reed-Solomon coding. Experimental results are provided. The application bit rate in function of BER for both reliable (TCP) and unreliable (UDP) mode of transport is presented. The end-to-end delay of the designed transceiver is also experimentally verified and analysed. |
