Speed-Up Gate Pulse Method to Suppress Switching Loss and Surge Voltage for MOS Gate Power Devices

Autor:	Hiroya Egashira, Hirotaka Oomori, Ichiro Omura
Jazyk:	angličtina
Rok vydání:	2022
Předmět:	switching loss surge voltage Trade-off
Zdroj:	2022 IEEE 34th International Symposium on Power Semiconductor Devices and ICs (ISPSD). :189-192
ISSN:	1946-0201
Popis:	There is a trade-off between surge voltage and switching loss in power semiconductors, and it has been difficult to reduce both. In order to solve this problem, the digital gate drive method has been studied. However, the digital gate drive method has the problem that the gate drive circuit is complicated and it takes time to search for the optimal drive waveform. In this study, we have proposed a new method that does not require optimization search, but only adds a simple circuit, which is expected to have the same effect as the digital gate drive method. IEEE International Symposium on Power Semiconductor Devices and ICs (ISPSD 2022), 22-25 May 2022, Vancouver, Canada
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_dedup___::9a9508e5b10f1788d30f6a7ef8dfce81 https://kyutech.repo.nii.ac.jp/records/7829 Zobrazit plný text záznamu