Improved high-temperature etch processing of high-k metal gate stacks in scaled TANOS memory devices
| Autor: | Thomas Melde, M. Mildner, Stephan Wege, E. Schütze, M. F. Beug, V. Beyer, K. Biedermann, Paweł Piotr Michałowski, R. Knöfler, Malte Czernohorsky, Thomas Mikolajick, Jan Paul |
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| Rok vydání: | 2010 |
| Předmět: |
Materials science
Nanotechnology 02 engineering and technology Integrated circuit 01 natural sciences law.invention chemistry.chemical_compound Tantalum nitride law 0103 physical sciences Electrical and Electronic Engineering Reactive-ion etching Metal gate High-κ dielectric 010302 applied physics business.industry 021001 nanoscience & nanotechnology Condensed Matter Physics Atomic and Molecular Physics and Optics Surfaces Coatings and Films Electronic Optical and Magnetic Materials Non-volatile memory CMOS chemistry Optoelectronics Dry etching 0210 nano-technology business |
| Zdroj: | Microelectronic Engineering |
| ISSN: | 0167-9317 |
| DOI: | 10.1016/j.mee.2009.10.030 |
| Popis: | Reactive ion etching using BCl"3-based plasma chemistries is a promising technique to pattern high-k metal gate stacks. High-k materials for non-volatile memory and CMOS applications, in particular Al"2O"3, possess high chemical resistance. Accordingly, a steep sidewall angle at the device edges is difficult to achieve by reactive ion etching. Advanced etch conditions at elevated temperatures (above 250 ^oC) is an alternative to solve this challenge but generate various other technological difficulties. In particular the patterning of TANOS devices reveals severe etch damage effects at the metal gate layer. A study of damage protection has been carried out and in particular the chemical stability of different metal gate options during plasma treatments was investigated in detail. Advanced process approaches to prevent the metal gate deterioration are proposed. |
| Databáze: | OpenAIRE |
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