DESIGN OF DELAY COMPUTATION METHOD FOR CYCLOTOMIC FAST FOURIER TRANSFORM
| Autor: | Prashant R. Deshmukh, Pravin Dakhole, Tejaswini P. Deshmukh, Monica Kalbande |
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| Rok vydání: | 2019 |
| Předmět: |
Area delay product
Adder Computer science Computation Gate Level Delay Expression (mathematics) Common Sub Expression Elimination Matrix (mathematics) symbols.namesake Finite field Fourier transform Cyclotomic fast Fourier transform Cyclotomic Fast Fourier Transform symbols Algorithm Critical Path Delay Hardware_LOGICDESIGN |
| DOI: | 10.5281/zenodo.3524070 |
| Popis: | In this paper the Delay Computation method for Common Sub expression Elimination algorithm is being implemented on Cyclotomic Fast Fourier Transform. The Common Sub Expression Elimination algorithm is combined with the delay computing method and is known as Gate Level Delay Computation with Common Sub expression Elimination Algorithm. Common sub expression elimination is effective optimization method used to reduce adders in cyclotomic Fourier transform. The delay computing method is based on delay matrix and suitable for implementation with computers. The Gate level delay computation method is used to find critical path delay and it is analyzed on various finite field elements. The presented algorithm is established through a case study in Cyclotomic Fast Fourier Transform over finite field. If Cyclotomic Fast Fourier Transform is implemented directly then the system will have high additive complexities. So by using GLDC-CSE algorithm on cyclotomic fast Fourier transform, the additive complexities will be reduced and also the area and area delay product will be reduced. |
| Databáze: | OpenAIRE |
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