Impact of the substrate and buffer design on the performance of GaN on Si power HEMTs
Autor: | M. Van Hove, Matteo Meneghini, Ming Zhao, Stefaan Decoutere, Steve Stoffels, Matteo Borga, Xiangdong Li, Gaudenzio Meneghesso, Enrico Zanoni |
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Rok vydání: | 2018 |
Předmět: |
Risk
Power HEMT Materials science 02 engineering and technology Epitaxy 01 natural sciences GaN Coatings and Films Electrical resistivity and conductivity Atomic and Molecular Physics 0103 physical sciences Electronic Breakdown voltage Wafer Optical and Magnetic Materials Electrical and Electronic Engineering Safety Risk Reliability and Quality Leakage (electronics) 010302 applied physics business.industry 021001 nanoscience & nanotechnology Condensed Matter Physics Atomic and Molecular Physics and Optics Surfaces Coatings and Films Electronic Optical and Magnetic Materials Threshold voltage Surfaces Reliability and Quality Engineered substrates Optoelectronics GaN buffer design and Optics Safety 0210 nano-technology business Current density Voltage drop |
Zdroj: | Microelectronics Reliability. :584-588 |
ISSN: | 0026-2714 |
DOI: | 10.1016/j.microrel.2018.06.036 |
Popis: | This paper presents an extensive analysis of the impact of substrate and buffer properties on the performance and breakdown voltage of E-mode power HEMTs. We investigated the impact of buffer thickness, substrate resistivity and substrate miscut angle, by characterizing several wafers by means of DC and pulsed measurement. The results demonstrate that: (i) the resistivity of the silicon substrate strongly impacts on the breakdown voltage and vertical leakage current. In fact, highly resistive substrates may partly deplete under high vertical bias, thus limiting the total potential drop on the epitaxial layers. As a consequence, the vertical I V plots show a “plateau”, that limits the vertical leakage. (ii) the depletion of the substrate may worsen the dynamic performance of the devices, due to an enhancement of buffer trapping. (iii) Larger buffer thickness results in an increased robustness of the vertical stack, due to the thicker insulating region. (iv) the miscut angle (0°, 0.5°, and 1°) can significantly impact on both threshold voltage and the 2DEG density; devices with miscut substrate have higher current density. On the other hand, the dynamic on-resistance variation is comparable in the three cases. |
Databáze: | OpenAIRE |
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