A 216–256 GHz fully differential frequency multiplier-by-8 chain with 0 dBm output power
| Autor: | Dietmar Kissinger, Minsu Ko, K. Schmalz, Mohamed Hussein Eissa, Ahmet Cagri Ulusoy, Andrea Malignaggi, Johannes Borngraber |
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| Rok vydání: | 2018 |
| Předmět: |
Physics
Gilbert cell mixers business.industry Frequency multiplier Amplifier 020208 electrical & electronic engineering Bandwidth (signal processing) Electrical engineering 620 Ingenieurwissenschaften und zugeordnete Tätigkeiten 020206 networking & telecommunications 02 engineering and technology Power budget Harmonics Hardware_INTEGRATEDCIRCUITS 0202 electrical engineering electronic engineering information engineering direct conversion ddc:620 Electrical and Electronic Engineering Wideband Transceiver business receivers |
| Zdroj: | International Journal of Microwave and Wireless Technologies. 10:562-569 |
| ISSN: | 1759-0795 1759-0787 |
| DOI: | 10.1017/s1759078718000235 |
| Popis: | Dieser Beitrag ist mit Zustimmung des Rechteinhabers aufgrund einer (DFG geförderten) Allianz- bzw. Nationallizenz frei zugänglich. This publication is with permission of the rights owner freely accessible due to an Alliance licence and a national licence (funded by the DFG, German Research Foundation) respectively. This work presents a fully differential wideband and low power 240 GHz multiplier-by-8 chain, manufactured in IHP's 130 nm SiGe:C BiCMOS technology with fT/fmax = 300/500 GHz. A single ended 30 GHz input signal is multiplied by 8 using Gilbert cell-based quadrupler and doubler, and then amplified with a wideband differential 3-stage cascode amplifier. To achieve wide bandwidth and optimize for power consumption, the power budget has been designed in order to operate the frequency multipliers and the output amplifier in saturation. With this architecture the presented circuit achieves a 3 dB bandwidth of 40 GHz, meaning a relative 3 dB bandwidth of 17%, and a peak saturated output power of 0 dBm. Harmonic rejections better than 25 dB were measured for the 5th, 6th, and 7th harmonics. It dissipates 255 mW from 3 V supply which results in drain efficiency of 0.4%, while occupying 1.2 mm2. With these characteristics the presented circuit suits very well as a frequency multiplier chain for driving balanced mixers in 240 GHz transceivers for radar, communication, and sensing applications. |
| Databáze: | OpenAIRE |
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