Low voltage cascode amplifier

Autor: Shahab Ardalan, K. Raahemifar, Fei Yuan
Rok vydání: 2021
Předmět:
DOI: 10.32920/14638515
Popis: A 0.8 V folded cascode operational amplifier was designed in 0.18 /spl mu/m standard CMOS technology. Emphasis was placed on observing the low voltage design and using a current driven bulk (CDB) technique to achieve this goal. The CDB technique was introduced as a method for low voltage design by reducing the threshold voltage. This design achieves 141 dB DC gain, 56 MHz 3 dB bandwidth and 65 GHz gain bandwidth, which is the working condition of pipeline ADCs.
Databáze: OpenAIRE