Stretching in Time of GaN Active Gate Driving Profiles to Adapt to Changing Load Current
| Autor: | Jeremy J. O. Dalton, Dawei Liu, David Drury, Harry C. P. Dymond, Jianjing Wang, Mohammad H. Hedayati, Bernard H. Stark |
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| Rok vydání: | 2018 |
| Předmět: |
Materials science
Clock rate Gallium nitride 02 engineering and technology GaN FET 01 natural sciences Signal chemistry.chemical_compound EMI 0103 physical sciences Hardware_INTEGRATEDCIRCUITS 0202 electrical engineering electronic engineering information engineering Overshoot (signal) Waveform 010302 applied physics business.industry Active Gate Driving 020208 electrical & electronic engineering Ringing Converters GaN Gate Driver chemistry Optoelectronics Arbitrary Waveform Gate Driver business Dynamic Output Resistance Gate Driver |
| Zdroj: | Dalton, J, Dymond, H C P, Wang, J, Hedayati, M, Liu, D, Drury, D & Stark, B H 2019, Stretching in Time of GaN Active Gate Driving Profiles to Adapt to Changing Load Current . in 2018 IEEE Energy Conversion Congress and Exposition (ECCE 2018) : Proceedings of a meeting held 23-27 September 2018, Portland, Oregon, USA ., 8557531, 2018 IEEE Energy Conversion Congress and Exposition, ECCE 2018, Institute of Electrical and Electronics Engineers (IEEE), pp. 3497-3502 . https://doi.org/10.1109/ECCE.2018.8557531 |
| Popis: | Active gate driving, where the gate signal is actively profiled, has been shown to reduce EMI, overshoot, and switching loss, in silicon power converters. Recently, much faster gate drivers with the ability to profile at a 100 ps resolution have been reported, which has opened up the possibility of actively driving emerging wide-bandgap devices. This could allow Gallium Nitride (GaN) and Silicon Carbide (SiC) FETs to be switched faster than is currently possible, as unwanted switching features such as current ringing at turn-on could be eliminated. However, these drivers have previously only been demonstrated with preprogrammed gate profiles that have been optimized at certain operating conditions, whereas converters typically operate in a range of conditions. In this paper, some limitations of using fixed gate profiles on GaN FETs are reported for the first time, and a new method of profile adaptation is demonstrated. First, the gate profiles in a 400 V GaN bridge‑ leg are optimized to minimize current ringing at turn-on for a given load current. Then, the load current is varied, showing that the gate signal profile remains close to optimal for ±20% changes in current. Also, over a larger range of at least ±35%, the profiled waveform performs better than a non-profiled gate waveform. It is then demonstrated that by slightly reducing the driver’s internal clock frequency with increasing load current, the profile is re-optimized for new load currents. It is concluded that driver clock frequency adaptation may be a means of adapting gate profiles to load current variation and possibly also to temperature variation. |
| Databáze: | OpenAIRE |
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