Influence of External Gate Resistance on UIS Capability in Superjunction MOSFET

Autor: Wataru Hirasawa, Suzuki Noriaki, Yamaguchi Takeshi, Asada Takeshi, Masaaki Honda, Yamaji Mizue, Watanabe Yuji, Arai Daisuke
Rok vydání: 2019
Předmět:
Zdroj: 2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD).
DOI: 10.1109/ispsd.2019.8757613
Popis: We investigated the UIS capability for superjunction MOSFETs with respect to the external gate resistance (R g ) and the charge imbalance (CIB) by experiments as well as device simulations. Measured UIS capability depends not only on the CIB but also on the R g . Higher UIS capability was exhibited for small R g than for large R g as deviating the CIB to $\mathbf{Q}_{\mathbf{n}} while the difference by R g was small for $\mathbf{Q}_{\mathbf{n}}=\mathbf{Q}_{\mathbf{p}}$ . The device simulations indicated that the device destruction by UIS is assumed to be related to the re-conduction of channel current (I ch ). When the R g is small, Ich turns off once while V ds has not increased enough to generate impact ionization. This transient behavior is different from the one for large R g . After that, Ich re-conduction occurs due to the high electric field beneath the MOS gate for $\mathbf{Q}_{\mathbf{n}}=\mathbf{Q}_{\mathbf{p}}$ but suppressed for $\mathbf{Q}_{\mathbf{n}} . The graded doping for N-column which reduces phosphorus concentration near the surface helps to suppress the re-conduction and improves the UIS capability for small R g condition.
Databáze: OpenAIRE