Design and implementation of MIMO-STBC systems on FPGA hardware
| Autor: | Bui Huu Phu, Au Ngoc Duc, Le Tran Danh, Nguyen Trung Hieu, Nguyen Thanh Tu |
|---|---|
| Rok vydání: | 2012 |
| Předmět: |
3G MIMO
business.industry Computer science ComputerSystemsOrganization_COMPUTER-COMMUNICATIONNETWORKS MIMO Data_CODINGANDINFORMATIONTHEORY Multi-user MIMO Spatial multiplexing Space–time block code Computer Science::Hardware Architecture Stratix Verilog business Field-programmable gate array computer Computer hardware Computer Science::Information Theory computer.programming_language |
| Zdroj: | The 2012 International Conference on Advanced Technologies for Communications. |
| DOI: | 10.1109/atc.2012.6404275 |
| Popis: | One potential technology to provide high speed data rate and reliable transmission for modern networks is multiple-input multiple-output (MIMO) systems, which are equipped multiple antennas at both the transmitters and receivers. The main purpose of this paper is to present our own design and implementation of MIMO Space-time block coding (STBC) systems with various number of transmit and receive antennas. They are implemented on FPGA Altera Stratix DSP Development KIT using Verilog HDL. BER performance of the systems with the different number of transmit and receive antennas is measured and compared in term of hardware and software simulation. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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