Feasibility Study of Fan-Out Panel-Level Packaging for Heterogeneous Integrations
| Autor: | N. C. Lee, Jeffery C. C. Lo, Jhih-Yuan Pan, Mian Tao, John H. Lau, Sze Pei Lim, Ming Li, R. So, Tony Chen, Eric Ng, Ricky Lee, Hsing-Hui Wu, Marc Lin, Zhang Li, Yiu Ming Cheung, Henry Yang, Kim Hwee Tan, Penny Lo, Cheng-Ta Ko, Chieh-Lin Chang, Y. H. Chen, Cao Xi, Eric Kuah, Rozalia Beica, Curry Lin, Iris Xu, Nelson Fan |
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| Rok vydání: | 2019 |
| Předmět: |
010302 applied physics
Materials science Fabrication 020208 electrical & electronic engineering Mechanical engineering Fan-out 02 engineering and technology Epoxy 01 natural sciences Line width Printed circuit board visual_art 0103 physical sciences 0202 electrical engineering electronic engineering information engineering visual_art.visual_art_medium |
| Zdroj: | 2019 IEEE 69th Electronic Components and Technology Conference (ECTC). |
| DOI: | 10.1109/ectc.2019.00010 |
| Popis: | The design, materials, process, and fabrication of a heterogeneous integration of 4 chips by a FOPLP (fan-out panel-level packaging) with chip-first and dies face-down formation are investigated in this study. Emphasis is placed on the application of a new assembly process and materials for fabricating the RDLs (redistribution layers) of the FOPLP. The panel size is 508mm x 508mm. The epoxy molding compound (EMC) is a dry-film material and is molded by lamination method. The minimum metal line width and spacing is 10µm and they are fabricated by printed circuit board (PCB) method and equipment. |
| Databáze: | OpenAIRE |
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