The hysteresis-free negative capacitance field effect transistors using non-linear poly capacitance

Autor:	Jhih-Yang Yan, Chee-Wee Liu, S.-T. Fan, D.-C. Lai
Rok vydání:	2016
Předmět:	Materials science Hardware_PERFORMANCEANDRELIABILITY 02 engineering and technology Dielectric 01 natural sciences Capacitance Computer Science::Hardware Architecture Computer Science::Emerging Technologies 0103 physical sciences Hardware_INTEGRATEDCIRCUITS Materials Chemistry Electrical and Electronic Engineering Scaling 010302 applied physics business.industry Electrical engineering Condensed Matter::Mesoscopic Systems and Quantum Hall Effect 021001 nanoscience & nanotechnology Condensed Matter Physics Electronic Optical and Magnetic Materials Nonlinear system Hysteresis Structure design Optoelectronics Field-effect transistor 0210 nano-technology business Negative impedance converter
Zdroj:	Solid-State Electronics. 122:13-17
ISSN:	0038-1101
Popis:	A gate structure design for negative capacitance field effect transistors (NCFETs) is proposed. The hysteresis loop in current–voltage performances is eliminated by the nonlinear C–V dependence of polysilicon in the gate dielectrics. Design considerations and optimizations to achieve the low SS and hysteresis-free transfer were elaborated. The effects of gate-to-source/drain overlap, channel length scaling, interface trap states and temperature impact on SS are also investigated.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::e80c6f49f854f121c0310ceb3fbe5107 https://doi.org/10.1016/j.sse.2016.04.012 Zobrazit plný text záznamu Full Text from ScienceDirect