A 1.5 V full-swing BiCMOS dynamic logic gate circuit suitable for VLSI using low-voltage BiCMOS technology
| Autor: | Shr-Lung Chen, J.H. Lou, C.S. Chiang, Jui-Chang Kuo, K.W. Su |
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| Rok vydání: | 1995 |
| Předmět: |
Combinational logic
Very-large-scale integration Engineering business.industry Electrical engineering Hardware_PERFORMANCEANDRELIABILITY Integrated circuit BiCMOS law.invention CMOS law Logic gate Hardware_INTEGRATEDCIRCUITS Electronic engineering Electrical and Electronic Engineering business Low voltage Dynamic logic (digital electronics) Hardware_LOGICDESIGN |
| Zdroj: | IEEE Journal of Solid-State Circuits. 30:73-75 |
| ISSN: | 0018-9200 |
| DOI: | 10.1109/4.350190 |
| Popis: | This paper presents a 1.5 V full-swing BiCMOS dynamic logic gate circuit, based on a dynamic pull-down BiPMOS configuration, suitable for VLSI using low-voltage BiCMOS technology. With an output load of 0.2 pf, the 1.5 V full-swing BiCMOS dynamic logic gate circuit shows a more than 1.8 times improvement in speed as compared to the CMOS static one. > |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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