Extraction of Two-Node Bridges From Large Industrial Circuits
Autor: | S.T. Zachariah, S. Chakravarty |
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Rok vydání: | 2004 |
Předmět: |
Engineering
business.industry Computer Graphics and Computer-Aided Design Circuit extraction Design layout record Computer engineering Memory architecture Scalability Electronic engineering Node (circuits) Electrical and Electronic Engineering Physical design Routing (electronic design automation) business Software IC layout editor |
Zdroj: | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 23:433-439 |
ISSN: | 0278-0070 |
DOI: | 10.1109/tcad.2004.823351 |
Popis: | Enumeration and prioritization of highly probable bridges based on the circuit layout and manufacturing defect data is a key step in defect-based testing. Existing solutions either do not scale to large designs or compromise on the accuracy of the computation when applied to very large circuits. This paper presents a scalable and efficient methodology to accurately extract two-node bridges from very large circuits. To our knowledge, this is the first solution to be presented that can process such large industrial designs accurately. It also naturally addresses two important issues viz. through the cell routing and name propagation. Experimental results illustrating key features of the algorithm, including scalability and efficient memory usage, are presented. |
Databáze: | OpenAIRE |
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