Accelerating 14nm device learning and yield ramp using parallel test structures as part of a new inline parametric test strategy
Autor: | Scott McDade, Garry Moore, Bill Verzi, Jiun-Hsin Liao |
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Rok vydání: | 2015 |
Předmět: | |
Zdroj: | Proceedings of the 2015 International Conference on Microelectronic Test Structures. |
Popis: | This paper will look at both technical and business advantages of parallel vs. serial inline parametric testing, secondary effects of changing test strategies, quantifying return on investment of newer test strategies, and next steps in pushing the envelope of test. Topics such as cost, schedule, macro design and quality will be explored to understand tradeoffs and synergies of test strategies. Examples and metrics of parallel compared to serial testing will be examined. |
Databáze: | OpenAIRE |
Externí odkaz: |