RRAM Defect Modeling and Failure Analysis Based on March Test and a Novel Squeeze-Search Scheme
| Autor: | Shyh Shyuan Sheu, Frederick T. Chen, Chih He Lin, Hsiu Chuan Shih, Ching-Yi Chen, Pi-Feng Chiu, Cheng-Wen Wu |
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| Rok vydání: | 2015 |
| Předmět: |
Scheme (programming language)
Random access memory Computer science business.industry Circuit design Process (computing) Hardware_PERFORMANCEANDRELIABILITY Fault (power engineering) Theoretical Computer Science Resistive random-access memory Computational Theory and Mathematics Hardware and Architecture Embedded system Electronic engineering business computer Software computer.programming_language |
| Zdroj: | IEEE Transactions on Computers. 64:180-190 |
| ISSN: | 2326-3814 0018-9340 |
| DOI: | 10.1109/tc.2014.12 |
| Popis: | The Resistive Random Access Memory (RRAM) is a new type of non-volatile memory based on the resistive memory device. Researchers are currently moving from resistive device development to memory circuit design and implementation, hoping to fabricate memory chips that can be deployed in the market in the near future. However, so far the low manufacturing yield is still a major issue. In this paper, we propose defect and fault models specific to RRAM, i.e., the Over-Forming (OF) defect and the Read-One-Disturb (R1D) fault. We then propose a March algorithm to cover these defects and faults in addition to the conventional RAM faults, which is called March C*. We also develop a novel squeeze-search scheme to identify the OF defect, which leads to the Stuck-At Fault (SAF). The proposed test algorithm is applied to a first-cut 4-Mb HfO 2 -based RRAM test chip. Results show that OF defects and R1D faults do exist in the RRAM chip. We also identify specific failure patterns from the test results, which are shown to be induced by multiple short defects between bit-lines. By identifying the defects and faults, designers and process engineers can improve the RRAM yield in a more cost-effective way. |
| Databáze: | OpenAIRE |
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