A 28 nm DSP Powered by an On-Chip LDO for High-Performance and Energy-Efficient Mobile Applications
| Autor: | Ken Lin, Dwight Galbi, Yuhe Wang, Kartik Ayyar, Tom Wernimont, Xufeng Chen, Marzio Pedrali-Noy, Paul Bassett, Dan Bui, Maen Alradaideh, Willie Anderson, Allan Lester, Baker Mohammad, Martin Saint-Laurent |
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| Rok vydání: | 2015 |
| Předmět: |
Engineering
Digital signal processor business.industry Clock gating Voltage regulator Very long instruction word Low-power electronics Logic gate Hardware_INTEGRATEDCIRCUITS Electronic engineering Hardware_ARITHMETICANDLOGICSTRUCTURES Electrical and Electronic Engineering business Qualcomm Hexagon Voltage |
| Zdroj: | ISSCC |
| ISSN: | 1558-173X 0018-9200 |
| Popis: | This paper describes the implementation of a Qualcomm Hexagon digital signal processor (DSP) in a 28 nm high-κ metal gate technology. The DSP is a multi-threaded very-long- instruction-word (VLIW) machine optimized for low leakage and energy efficiency. It uses a clock distribution network, clock gating cells, and pulsed latches that are optimized for low switching energy. The processor can be powered using a low-dropout (LDO) voltage regulator or a head switch. It operates from 255 MHz at 0.60 V to 1.24 GHz at 1.05 V. When operating from the LDO, the power consumption of the core can be as low as 58 µW/MHz, which is two to three times lower than comparable cores optimized for ultra-low voltage operation. |
| Databáze: | OpenAIRE |
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