A high performance, high voltage output buffer in a low voltage CMOS process
| Autor: | H.M. Roopashree, S.K. Jacob, Karthik Rajagopal, Vinod Menezes, Rajat Chauhan |
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| Rok vydání: | 2006 |
| Předmět: |
Engineering
Bandgap voltage reference business.industry Voltage divider Buffer amplifier Electrical engineering Diode-or circuit Hardware_PERFORMANCEANDRELIABILITY Voltage regulator High impedance Dropout voltage Hardware_INTEGRATEDCIRCUITS Electronic engineering Equivalent circuit business Hardware_LOGICDESIGN |
| Zdroj: | CICC |
| DOI: | 10.1109/cicc.2005.1568648 |
| Popis: | The proposed output buffer circuit uses 1.8V transistors in 90nm CMOS process to develop I/Os for 2.5V and 3.3V interfaces. A voltage clamp circuit, bias generators, and a feedback circuit are used to ensure reliability and noise decoupling. Use of these circuits enables achieving low power (130/spl mu/A) and high performance (up to 275MHz) in a comparative area of an equivalent I/O in 90nm 3.3V process. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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