Embedded 1-Mb ReRAM-Based Computing-in- Memory Macro With Multibit Input and Weight for CNN-Based AI Edge Processors
| Autor: | Tung-Cheng Chang, Jing-Hong Wang, Je-Syu Liu, Chrong Jung Lin, Wei-En Lin, Ya-Chin King, Cheng-Xin Xue, Tsung-Yuan Huang, Chun-Ying Lee, Ren-Shuo Liu, Meng-Fan Chang, Wei-Hao Chen, Kea-Tiong Tang, Hui-Yao Kao, Wei-Yu Lin, Yen-Cheng Chiu, Jiafang Li, Ting-Wei Chang, Chih-Cheng Hsieh, Wei-Chen Wei |
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| Rok vydání: | 2020 |
| Předmět: | |
| Zdroj: | IEEE Journal of Solid-State Circuits. 55:203-215 |
| ISSN: | 1558-173X 0018-9200 |
| DOI: | 10.1109/jssc.2019.2951363 |
| Popis: | Computing-in-memory (CIM) based on embedded nonvolatile memory is a promising candidate for energy-efficient multiply-and-accumulate (MAC) operations in artificial intelligence (AI) edge devices. However, circuit design for NVM-based CIM (nvCIM) imposes a number of challenges, including an area-latency-energy tradeoff for multibit MAC operations, pattern-dependent degradation in signal margin, and small read margin. To overcome these challenges, this article proposes the following: 1) a serial-input non-weighted product (SINWP) structure; 2) a down-scaling weighted current translator (DSWCT) and positive–negative current-subtractor (PN-ISUB); 3) a current-aware bitline clamper (CABLC) scheme; and 4) a triple-margin small-offset current-mode sense amplifier (TMCSA). A 55-nm 1-Mb ReRAM-CIM macro was fabricated to demonstrate the MAC operation of 2-b-input, 3-b-weight with 4-b-out. This nvCIM macro achieved $T_{\text {MAC}}= 14.6$ ns at 4-b-out with peak energy efficiency of 53.17 TOPS/W. |
| Databáze: | OpenAIRE |
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