Autor: |
Holger Eisenreich, Rene Schuffny, Chenming Shao, Sebastian Hoppner, Mario Ander, Georg Ellguth |
Rok vydání: |
2012 |
Předmět: |
|
Zdroj: |
ISCAS |
Popis: |
This paper presents a power management architecture for MPSoCs that allows fast switching between multiple onchip supply voltage levels per core. Operation is based on distinct scenarios for power-up and supply level change, with individual numbers of pre-charge switches for supply noise reduction. The power management controller is highly configurable for adaption to a wide range of supply network parasitics in heterogeneous MPSoCs. This architecture has been validated by measurements in 65nm CMOS technology. Power-up and DVFS level changes can be performed in less than 20ns with reduced parasitic voltage drop of active cores. |
Databáze: |
OpenAIRE |
Externí odkaz: |
|