Automatic DFM methodology for bit line pattern dummy

Autor:	Mohamed H. Bahr
Rok vydání:	2015
Předmět:	Hardware_MEMORYSTRUCTURES Physical verification Computer science business.industry Computer data storage Hardware_INTEGRATEDCIRCUITS Bit line Hardware_PERFORMANCEANDRELIABILITY business Memory test Computer hardware Design for manufacturability
Zdroj:	SPIE Proceedings.
ISSN:	0277-786X
DOI:	10.1117/12.2185545
Popis:	This paper presents an automated DFM solution to generate Bit Line Pattern Dummy (BLPD) for memory chips. Dummy shapes are aligned with memory functional bits lines to ensure uniform and reliable memory device. This paper will present a smarter approach that uses an analysis based technique for adding the dummy fill shapes that have different types according to the space available. Experimental results based on layout of a memory test chip.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::c0f8bdeb6d2ce03f10e43b9876db4e7b https://doi.org/10.1117/12.2185545 Zobrazit plný text záznamu