High bandwidth interconnect design opportunities in 2.5D Through-Silicon interposer (TSI)
| Autor: | Rahul Dutta, Ka Fai Chang, Joseph Romen Cubillo, Songbai Zhang, Guruprasad Katti, Hongyu Li, Roshan Weerasekera |
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| Rok vydání: | 2016 |
| Předmět: |
Interconnection
Materials science Silicon business.industry Bandwidth (signal processing) Electrical engineering Three-dimensional integrated circuit Fine pitch chemistry.chemical_element Hardware_PERFORMANCEANDRELIABILITY 02 engineering and technology 020202 computer hardware & architecture Silicon interposer chemistry Hardware_INTEGRATEDCIRCUITS 0202 electrical engineering electronic engineering information engineering Electronic engineering High bandwidth business Data transmission |
| Zdroj: | 2016 IEEE 18th Electronics Packaging Technology Conference (EPTC). |
| DOI: | 10.1109/eptc.2016.7861479 |
| Popis: | Silicon interposer technology enables the integration of multiple silicon dies on it providing fine pitch interconnects for die-to-die communication and Through-Silicon Vias (TSVs) for package/PCB level connections. Therefore, this technology has been identified as a viable solution for logic and memory types of applications where higher bandwidth in required. In the paper, we characterize thick (t=3μm; w/s=3μm/3μm) as well as thin (t=1μm; w/s=2μm/2μm) front side die-to-die Cu interconnects along with chip-to-substrate interconnects containing Through-Silicon Vias (TSVs) and estimate the data transfer capabilities of them. Evaluation of digital signal interconnect performance shows that the maximum bandwidth requirements expected by the latest memory technologies can be achieved by the silicon interposer technologies characterised in this paper. |
| Databáze: | OpenAIRE |
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