A case for hardware-supported sub-cache line accesses
| Autor: | Amithaba Roy, Markus Dreseler, Christopher Schmidt, Berkin Akin |
|---|---|
| Rok vydání: | 2018 |
| Předmět: |
010302 applied physics
Hardware_MEMORYSTRUCTURES Computer science CPU cache Memory bandwidth 02 engineering and technology computer.software_genre 01 natural sciences 020202 computer hardware & architecture 0103 physical sciences 0202 electrical engineering electronic engineering information engineering Operating system Bandwidth (computing) Granularity Cache Line (text file) computer |
| Zdroj: | DaMoN |
| DOI: | 10.1145/3211922.3211924 |
| Popis: | Largely, the performance of main-memory databases is limited by the growing memory gap. To be efficient, a DBMS cannot waste any bandwidth. However, this is exactly the case when 64-byte cache lines are transferred but only parts of these are used. We present a cache simulator that measures this waste, show that current databases waste up to 70% of the available bandwidth, and discuss a new gather instruction with sub-cache line access granularity that could reduce this waste. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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