Design and realization of DRFM system based on FPGA and DSP
| Autor: | Jiazhi Huang, Xiongjun Fu, Min Xie, Yuansong Jiang |
|---|---|
| Rok vydání: | 2015 |
| Předmět: |
Hardware architecture
Computer science business.industry media_common.quotation_subject Bandwidth (signal processing) Debugging Radar jamming and deception Electronic engineering Digital radio frequency memory Radio frequency business Field-programmable gate array Digital signal processing media_common |
| Zdroj: | IET International Radar Conference 2015. |
| Popis: | A Digital Radio Frequency Memory (DRFM) system is designed to digitize a Radio Frequency (RF) input signal at a specific frequency and bandwidth to represent the signal adequately, and then reconstruct that RF signal after a series of process such as storage, time-delay and frequency shifting. The hardware requirement for general purpose DRFM system is analyzed and the hardware architecture based on the FPGA and DSP techniques is proposed. Due to a reasonable division of the functional module, the overall power consumption is very low. At the same time, online-updating and dynamic loading of the FPGA program can be easily achieved through serial peripheral interface (SPI) for operation and debugging. This frame has already been actually applied to a radar deceptive jammer, and it turns out that the system is truly valid. |
| Databáze: | OpenAIRE |
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