Simulation of CMOS logic inverter based on vertically stacked polycrystalline silicon nanosheet gate-all-around MOSFET and its electrical characteristics
| Autor: | So Ra Min, Sang Ho Lee, Jin Park, Geon Uk Kim, Ga Eon Kang, Jun Hyeok Heo, Young Jun Yoon, Jae Hwa Seo, Jaewon Jang, Jin-Hyuk Bae, Sin-Hyung Lee, In Man Kang |
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| Rok vydání: | 2022 |
| Předmět: | |
| Zdroj: | Current Applied Physics. 43:106-115 |
| ISSN: | 1567-1739 |
| DOI: | 10.1016/j.cap.2022.08.015 |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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