Autor: |
Guruprasad Katti, Roshan Weerasekera, Joseph Romen Cubillo |
Rok vydání: |
2012 |
Předmět: |
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Zdroj: |
2012 IEEE 14th Electronics Packaging Technology Conference (EPTC). |
DOI: |
10.1109/eptc.2012.6507115 |
Popis: |
This paper describes the electrical characteristics of the fine pitch interconnects in silicon carrier systems. The characteristics of such interconnects are explored and a typical FPGA-memory system is compared viz-a-viz with a traditional PCB system from low data rates to higher data rates. Our case-study shows that even though highly resistive wires are used in silicon carrier the interconnects are SI robust due to the shorter die to die interconnect length and the absence of package parasitics. |
Databáze: |
OpenAIRE |
Externí odkaz: |
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