Latency Aware Fault Tolerant Cache in Multicore Using Dynamic Remapping Clusters

Autor:	Brototi Mondal, Biplab K. Sikdar, Avishek Choudhury
Rok vydání:	2019
Předmět:	Hit ratio Multi-core processor Hardware_MEMORYSTRUCTURES Minimum latency Computer science Dynamic demand Fault tolerance Leakage power Parallel computing Cache Latency (engineering)
Zdroj:	ATS
DOI:	10.1109/ats47505.2019.00014
Popis:	This work proposes a re-usability aware fault remapping scheme for multicore NUCA cache. It replicates data in non-reusable blocks to ensure full error coverage and minimum latency, by forming dynamic remapping clusters around the home tiles. Simulations in Multi2Sim 5.0 claim up to 18.64% increase in hit ratio and 20.79% decrease in latency in last-level cache over the existing techniques with 3.17% area, 5.35% leakage power and 3.34% dynamic power overheads.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::809263b9341af9d36e3fea690c2daa09 https://doi.org/10.1109/ats47505.2019.00014 Zobrazit plný text záznamu