Autor: |
Y. D. Lin, Y. S. Chen, K. H. Tsai, P. S. Chen, Y. C. Huang, S. H. Lin, P. Y. Gu, W. S. Chen, H. Y. Lee, S. Z. Rahaman, C. H. Hsu, F. T. Chen, T. K. Ku |
Rok vydání: |
2015 |
Předmět: |
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Zdroj: |
2015 International Symposium on VLSI Technology, Systems and Applications. |
DOI: |
10.1109/vlsi-tsa.2015.7117559 |
Popis: |
Owing to NAND flash technology facing its scaling limit, resistive random access memory (RRAM) with simple film stack and no cross coupling issue between cells is a promising candidate for future high density memory application [1,2]. The 1TnR architecture with 3D vertical RRAM (VRRAM) structure realizes ultra-low bit cost for high compact density array [3,4]. However, this novel 1TnR structure and processes have not been proved yet. To meet requirements of VRRAM array operation, the nonlinear resistive memory with an excellent self-compliance and low current operation is indispensable [5,6]. A large voltage margin for the device operated with compliance current (ΔV COMP ) and high nonlinearity for the device at low resistance state (LRS) with reliable read voltage should be addressed. |
Databáze: |
OpenAIRE |
Externí odkaz: |
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