| Autor: |
S. Bhatia, M. Conta, F. Behbahani, R. Chokkalingam, H. Firouzkouhi, Med Nariman, A. Kheirkhahi, S. Delshadpour |
| Rok vydání: |
2002 |
| Předmět: |
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| Zdroj: |
IEEE Journal of Solid-State Circuits. 37:1721-1727 |
| ISSN: |
0018-9200 |
| DOI: |
10.1109/jssc.2002.804355 |
| Popis: |
A fully integrated Global Positioning System (GPS) radio is presented. Low-IF architecture was used for a high level of integration and low power consumption. An on-chip analog image-reject filter provides 18 dB of image-noise rejection to prevent noise figure (NF) degradation. With image rejection performed in the analog radio, a single-path (nonquadrature) output was used. The integrated synthesizer only requires an off-chip phase-locked loop-filter to function. Implemented in a 0.35-/spl mu/m 2P4M CMOS process, the integrated radio has a chip area of 9.5 mm/sup 2/. The radio operates over a wide range of voltage and temperature, from 2.2 to 3.6 V and from -40/spl deg/C to +85/spl deg/C and consumes 27 mW from a 2.2-V supply. The receiver has 4 dB NF. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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