Efficient Computation Techniques and Hardware Architectures for Unitary Transformations in Support of Quantum Algorithm Emulation
Autor: | Bennett Haase-Divine, Annika Kuhnke, Andrew MacGillivray, Apurva Rai, Esam El-Araby, Naveed Mahmud |
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Rok vydání: | 2020 |
Předmět: |
Emulation
business.industry Computer science Computation 020206 networking & telecommunications 02 engineering and technology Reconfigurable computing Theoretical Computer Science Computer Science::Hardware Architecture Hardware and Architecture Control and Systems Engineering Search algorithm Modeling and Simulation Signal Processing Scalability 0202 electrical engineering electronic engineering information engineering 020201 artificial intelligence & image processing Quantum Fourier transform Quantum algorithm business Computer Science::Operating Systems Computer hardware Information Systems Quantum computer |
Zdroj: | Journal of Signal Processing Systems. 92:1017-1037 |
ISSN: | 1939-8115 1939-8018 |
Popis: | As the development of quantum computers progresses rapidly, continuous research efforts are ongoing for simulation and emulation of quantum algorithms on classical platforms. Software simulations require use of large-scale, costly, and resource-hungry supercomputers, while hardware emulators make use of fast Field-Programmable-Gate-Array (FPGA) accelerators, but are limited in accuracy and scalability. This work presents a cost-effective FPGA-based emulation platform that demonstrates improved scalability, accuracy, and throughput compared to existing FPGA-based emulators. In this work, speed and area trade-offs between different proposed emulation architectures and computation techniques are investigated. For example, stream-based computation is proposed that greatly reduces resource utilization, improves system scalability in terms of the number of emulated quantum bits, and allows for dynamically changing algorithm inputs. The proposed techniques assume that the unitary transformation of the quantum algorithm is known, and the matrix values can be pre-computed or generated dynamically. 32-bit floating-point precision is used for high accuracy and the architectures are fully pipelined to ensure high throughput. As case studies for emulation, the quantum Fourier transform and Grover’s search algorithms are investigated and quantum circuits for multi-pattern Grover’s search are also proposed. Experimental evaluation and analysis of the emulation architectures and computation techniques are provided for the investigated quantum algorithms. The emulation framework is prototyped on a high-performance reconfigurable computing (HPRC) system and the results show quantitative improvement over existing FPGA-based emulators. |
Databáze: | OpenAIRE |
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